IEEE Std 802.3ch-2020 pdf free download – IEEE Standard for Ethernet Amendment 8: Physical Layer Specifications and Management Parameters for 2.5 Gb/s, 5 Gb/s, and 10 Gb/s Automotive Electrical Ethernet.
45.2.1.192.1 PMAIPMD reset (1.2309.15) Resetting the MultiGBASE-T1 PMA/PMD is accomplished by stting bit 1.2309.15 to a one.
This action shall set all PMAPMD registers to their default states. As a consequence, this action may change the internal state of a MultiGBASE-T1 PMA/PMD and the state of the physical link. This action may also initiate a reset in any other MMDs that are instantiated in the same package. Bit 1.2309.15 is self-clearing, and the MultiGBASE-T1 PMAPMD shall return a value of one in bit 1 .2309.15 when a reset is in progress; otherwise, it shall returm a value of zero. The MultiGBASE-T1 PMA/PMD is not required to accept a write transaction to any of its registers until the reset process is completed.
The control and management interface shall be restored to operation as defined in 149.4.2.1, starting when bit 1.2309.15 is set. . During a reset, the MultiGBASE-T1 PMA/PMD shall respond to reads from register bits 1.2309. 15, 1.8.15:14, and 1.0.15. All other register bits shall be ignored. NOTE- This operation may iterrupt data communication. Bit 1.2309.15 is a copy of bit 1.0.15 and setting or clearing either bit shall set or clear the other bit. Setting either bit shall reset the MultiGBASE-TI PMAPMD.
45.2.1.192.2 Transmit disable (1.2309.14) When bit 1.2309. 14 is set to a one, the PMA shall disable output on the transmit path. When bit 1.2309.14 is set to a zero, the PMA shall enable output on the transmit path.
Bit 1.2309.14 is a copy of bit 19.0 and stting or clearing either bit shall set or clear the other bit. Setting either bit shall disable the transmitter. 45.2.1.192.3 Low power (1.2309.11) When the low-power ability is supported, the MultiGBASE-TI PMA/PMD may be placed into a low-power mode by setting bit 1.2309.11 to one. This action may also initiate a low-power mode in any other MMDs that are instantiated in the same package. The low-power mode is exited by resetting the MultiGBASE-TI PMA/PMD. The behavior of the MultiGBASE-TI PMA/PMD in transition to and from the low-power mode is implementation specific and any interface signals should not be relied upon. While in the low-power mode, the device shall, at a minimum, respond to management transactions necessary to exit the low-power mode.
The default value of bit 1.2309.11 is zero.
This operation interrupts data communication.
Bit 1.2309.11 is a copy of bit 1.0.11 and setting or clearing either bit shall set or clear the other bit. Setting either bit shall put the MultiGBASE-TI PMA/PMD in low-power mode.
45.2.1.193 MultiGBASE-T1 PMA status register (1 .2310)
The assignment of bits in the MultiGBASE-T1 PMA status register is shown in Table 45- -155b.IEEE Std 802.3ch pdf download.