IEEE 8023cq-2020 pdf free download – IEEE Standard for Ethernet Amendment 6: Maintenance #13: Power over Ethernet over 2 pairs.
30. Management
30.9 Management for Power over Ethernet
30.9.1 PSE managed object class
30.9.1 .1 PSE attributes
Change 30.9.1.1.9 (as modifed by IEEE sad 802.30-2018) 8 flloms:
30.9.1.1.9 aPSEOverLoadCounter
ATTRIBUTE
APPROPRIATE SYNTAX:
Genernalized nonresetable counter. This counter has a maximum increment rate of 2 counts per second.
BEHAVIOUR DEFINED AS:
This counter is incremented whan the PSE state diagram (Figure 339 and Figure 145-13) enters the sate ERROR DELAY due 1to tbhe axld delected variable being TRUE, For Type I or Type2 PSEs, ifa Clause 22 MII or Clause 35 GMII is present, then this will map to the Overload bit spexifiod in 3.5.1.28;
33.1.4 Type 1 and Type 2 system parameters
Change 33.1.4 as follows:
A power system, consisting of a single PSE, link segment section, and a single PD, defined as either Type 1 or Type 2, has certain basic parameters defined according to Table 33- -1. These parameters define not only certain performance characteristics of the system, but are also used in calculating the various electrical characteristics of PSEs and PDs as described in 33.2 and 33.3.
It should be noted that the cable references use “DC loop resistanee,” which refers to a single conductor.
This clause uses“DC pair loop rsisance,” which refers to a pair of conductors in pallel Therefore, Rcnis related to, but not equivalent to, the *DC loop resistance” called out in the cable rferences.
Iew- is the cursat on sitber powered npair.
Ypo- is the yltagc at the PD PL. measured betwcn any positivs conductor and any ngative conductor of the powcred pairs.
YpsE- is the volagc世the PSE PI. measured betwecn any positive conductor and any ngative conductor oaf the powered pairs.
33.2 Power sourcing equipment (PSE)
33.2.3 PI pin assignments
Change the last parwgraph in 33.2.3 as fllous
A PSE shall implement Altemative A, AltermativeB, or both. While a PSE may be capable of both Altemative A and Altemative B, PSEs shall not operate both Altemative A and Alternative B on the same link sgment scction siultancously
33.2.4 PSE state diagrams
33.2.4.4 Variables
Change the defrinior of varible pd dl powver_ ope in 3244 as folows:
pd_ dl power. type
A control variable itially _output by the PSE power control state diagram (Figure 33- 27 which san bxe updated by LLDP (ss Tabls 33 23). that indicates the type of PD as advertised through Data Link Layer lasisication.
Valuesl: PD isa Type 1 PD (default)
2: PD isa Type2 PD
33.2.5 PSE detection of PDs
Change the second parugraph of 332.5 fllows.
The PSE probes the link section in order to detect a valid PD detection signature. The PSE PI is connected to a PD through a link segment sctin. In the fllowing subeluses, the link is not clledl out to preserve clarity.
33.2.6 PSE classification of PDs and mutual identification Change the paragraph fllowing Equation (33 -3) as fllows wherc
is the voltage at the PSE PI as defined in 1.4.503 331.4 RChan
is the channel DC pair loop resistance Pclas_ Pp .
is the PD’s power casification (see Table 33- 18).IEEE 8023cq pdf download.