BS IEC 62014-5:2015 pdf free download – Quality of Electronic and Software Intellectual Property Used in System and System on Chip (SoC) Designs.
2. Normative references
The following referenced documents are indispensable for the application of this document (i.e., they mustbe understood and used, so each referenced document is cited in text and its relationship to this document isexplained).For dated references, only the edition cited applies. For undated references, the latest edition ofthe referenced document (including any amendments or corrigenda) applies.
w3C,XML Schema,12 September 2005.6
w3C,XML Schema,Part 1: Structures, Second Edition, W3C Recommendation,28 October 2004.7
3. Definitions, acronyms, and abbreviations
3.1 Definitions
For the purposes of this document,the following terms and definitions apply.The IEEE StandardsDictionary: Glossary of Terms & Definitions should be referenced for terms not defined in this clause.”
design database: Working storage for both metadata and component information that helps create andverify systems and subsystems.
design environment (DE): The coordination of a set of tools and electronic design intellectual property(IP), or expressions of that IP(e.g., models) so the system design and implementation flows of a system onchip(SoC) reuse-centric development flow is efficiently enabled. This is managed by creating andmaintaining a metadata description of the SoC.
electronic design intellectual property (IP): A term used in the electronic design community to refer to areusable collection of design specifications that represent the behavior, properties, and/or representation ofthe design in various media. The name IP is partially derived from the common practice of considering acollection of this type to be the intellectual property of one party.Both hardware and software collectionsare encompassed by this term.IP utilized in the context of a system on chip (SoC) design or design flowmay include specifications;design models; design implementation descriptions;verification coordinators,stimulus generators, checkers and assertion/constraint descriptions; soft design objects (such as embeddedsoftware and real-time operating systems); design and verification flow information and scripts.
eXtensible Markup Language (XML): A simple,very flexible text format derived from SGML.NOTE—See ISO/IEC 8879 [B3].”
lP provider: Creator and supplier of electronic design intellectual property (IP).IP repository: Database of electronic design intellectual property (IP).
metadata: A tool-interpretable way of describing the design history,locality,object association,configuration options, constraints against, and integration requirements of an object.
meta IP: Metadata description of an object.
schema: A means for defining the structure, content, and semantics of XML documents.
semantic consistency rules (SCRs): Additional rules applied to an XML description that cannot be expressed in the schema. Typically, these are rules between elements in multiple XML descriptions.
use model: A process method of working with a tool.
user interface: Methods of interacting between a tool and its user.
validation: Proving the correctness of construction of a set of components.
verification: Proving the behavior of a set of connected components.
view: An implementation of a component. A component may have multiple views, each with its own function in the design flow.
verification IP (VIP): Components included in a design for verification purposes.
XSLT: XSL Transform is a particular program written in the XSL language for performing a transformation (from one version to the next).
3.2 Acronyms and abbreviations
DE design environment
EDA electronic design automation
HDL hardware description language
IP electronic design intellectual property
QIP Quality IP
RTL register transfer level (design)
SCR semantic consistency rule
SoC system on chip
VIP verification IP
XML eXtensible Markup Language
XSLT XSL Transform.BS IEC 62014-5 pdf download.
BS IEC 62014-5:2015 pdf free download – Quality of Electronic and Software Intellectual Property Used in System and System on Chip (SoC) Designs
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